Silicon Design Verification Engineer
MARKHAMCA$105.6k - CA$158.4kFull-timePosted 1mo ago
About the role
Role in AMD's SOC Verification Team focusing on silicon design verification using UVM, SystemVerilog, and C for state-of-the-art processor architectures; includes block and subsystem level verification, performance and power-aware verification, and collaboration with RTL engineers.
Responsibilities
- Work with senior verification engineers and create test plans for complex IP designs.
- Design testbenches in System Verilog and UVM to complete verification of the design in an efficient manner.
- Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools
- Debug tests with design engineers to deliver functionally correct design blocks and close the coverage.
- Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design
- Responsible for verification quality metrics like pass rates, code coverage and functional coverage
Qualifications
- Bachelor's or Master's degree in Computer Engineering/Electrical Engineering
- Preferred experience with design concepts and RTL implementation
- Good understanding of computer organization/architecture and digital logic fundamentals
- Knowledge of object oriented concepts and programming languages like SystemVerilog, C++
- Hands on Python scripting for automation
- Prior experience with protocols such as PCIe, AMBA AXI is a plus
- Prior design/verification industry experience is a plus with hands on experience on UVM
Skills
Required:SystemVerilogUVM
Nice to have:C/C++Python
Benefits
- AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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