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ATE Test Engineer

AMD· Engineering
Apply on company site
Austin, TX$130.4k - $195.6kFull-timePosted 1mo ago

About the role

Experienced test engineer to develop and advance wafer-sort test infrastructure on Advantest V93000 platforms using SmarTest 8, contributing to AMD’s Base Test Program and Test Shell across the product lifecycle from first-silicon bring-up to high-volume manufacturing.

Responsibilities

  • Develop and integrate reusable wafer-sort Base Test Program and common Test Shell infrastructure, including test flows, services, configurations, diagnostics, data collection, and release controls.
  • Lead SmarTest 8 and Advantest V93000 test program development, debug, validation, release readiness, and production support.
  • Drive wafer-sort strategy, first-silicon bring-up, characterization, margining, screening and diagnostics.
  • Integrate patterns, timing, levels, test methods, device configurations, binning, and debug capabilities into the common test program.
  • Troubleshoot complex interactions across silicon, test software, tester and probe hardware, patterns, timing, and manufacturing processes.
  • Partner with Design, Design for Test, Product Engineering, Yield Engineering, Test Hardware, and Manufacturing teams to improve coverage, testability, yield, test time, and product quality.
  • Define scalable architecture and coding practices that enable reuse across products, silicon revisions, test insertions, and manufacturing sites.
  • Lead technical reviews, document architectural decisions, mentor engineers, and support global engineering teams, manufacturing partners, and equipment vendors.

Qualifications

  • Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Extensive Advantest V93000 test program development and debug experience, including SmarTest 8.
  • Proficiency in Java and at least one additional language, such as C++, Python, Perl, or shell scripting.
  • Experience developing test flows, methods, patterns, timing, levels, diagnostics, characterization plans, and manufacturing screens.
  • Experience leading or making significant architectural contributions to a Base Test Program, common Test Shell, or similar shared ATE infrastructure.
  • Linux or Unix proficiency, including revision control and disciplined software-release practices.
  • Experience with ORE or comparable offline simulation tools.
  • Knowledge of technologies such as PCIe, CXL, UCIe, Ethernet, JESD204, USB, DDR, HBM PHY, xGMI/Infinity Fabric, UPI, or NVLink.
  • Experience with link training, equalization, lane-level diagnostics, bit-error-rate testing, jitter analysis, voltage and timing margining, or ATE-to-bench correlation.
  • Knowledge of chiplet architectures, 2.5D/3D packaging, interposers, bridges, and known-good-die considerations.
  • Experience using AI-enabled or agentic workflows to improve test development, debug, validation, documentation, or engineering productivity.
  • Strong communication skills and demonstrated success leading and collaborating across geographically distributed teams.

Skills

Required:Advantest V93000SmarTest 8JavaLinux/UnixSystems integrationDebuggingCommunication
Nice to have:C++Python
Last updated Oct 22, 2026. Interested? Apply on the company site.
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