Senior Staff Pre Silicon Verification Engineer
San Jose, CA$200k - $300kFull-timePosted 4w ago
About the role
Senior Staff Silicon Design Verification Engineer in the Adaptive and Embedded Computing Group (AECG) focusing on verification of high-speed memory controllers (DDR5, LPDDR6, HBM4), cryptography, and Network-on-Chip (NoC) IPs for pre-silicon designs. Lead architecture, development, and execution of verification environments at IP and SoC levels, manage teams, and drive first-pass silicon success.
Responsibilities
- Lead the verification of high-speed Crypto, Network-on-Chip (NoC), cutting-edge DRAM Memory controller (DDR5, LPDDR6, HBM4) designs, ensuring the highest standards of quality and performance.
- Architect, develop, and use simulation and/or formal-based verification environments at IP and SoC-level.
- Lead and manage verification teams, including planning, execution, tracking, verification closure, and delivery to programs.
- Develop and execute comprehensive verification plans, including testbenches and test cases.
- Collaborate with design, architecture, and software teams to define and implement verification strategies.
- Utilize advanced verification methodologies, including UVM, formal verification, and assertion-based verification.
- Mentor and guide junior engineers, fostering a collaborative and innovative team environment.
Qualifications
- BS with 8+ years or MS with 6+ years or PhD with 3+ years in Electrical Engineering, Computer Engineering, or Computer Science.
Skills
Required:Memory controller verification (DDR, LPDDR, HBM)UVMSystemVerilogVerification leadership
Nice to have:Formal verification
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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