DFT Pattern
Hybrid (Bangalore)Full-timePosted 4w ago
About the role
Senior pattern verification engineer responsible for owning and delivering pattern verification for complex system-on-chip (SoC) designs, including X86 cores, graphics, data fabric and IPs, across verification flows and tools.
Responsibilities
- Own/lead the Pattern verification activities on complex SOCs.
- Verify and deliver patterns to Product Engineering team for silicon validation.
- Port test sequences from IP to SOC, run and verify at SOC, debug failures, and deliver passing patterns.
Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Skills
Required:Pattern verificationTest sequence porting to SOCVerification flows and tools (VCS, Verdi)Protocols: AMBA, HSIO, IEEE 1149.1, 1678, 1500Debug skillsHardware verification languagesFunctional / SoC verification and EmulationProgramming
Nice to have:Architecture exposure (x86 or ARM)
Last updated Sep 24, 2026. Interested? Apply on the company site.
About AMD
together we advance_AI
AMD delivers leadership high-performance and adaptive computing solutions to advance data center AI, AI PCs, intelligent edge devices, gaming, & beyond.
AIData CenterHigh-Performance ComputingGamingEdge Devices
More open roles at AMD
- System Thermal Design Staff Engineer4d agoPenang, Malaysia · Engineering
- PD Engineer4d agoHybrid (Bangalore) · Engineering
- PD Engineer4d agoBangalore · Engineering
- Low-Power & CDC Verification Engineer4d agoSanta Clara, California · Engineering
- Technical Program Manager4d agoShanghai · Engineering