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Digital/Mixed Signal Modeling/Verification Engineer

Apple· Hardware
Apply on company site
Sunnyvale, CA, Austin, TX$184.7k - $324.8kFull-timePosted 4w ago

About the role

Verification engineer responsible for RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks inside a large SoC, including self-checking models, assertions, AMS environment setup with analog designers, and debugging chip testbenches.

Responsibilities

  • Development of RNM RF/Analog models in SystemVerilog.
  • Develop models with self-checking techniques.
  • Assess required model accuracy level depending on verification goals.
  • Develop appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing criteria.
  • Work with Analog designers setting up AMS simulation environment.
  • Debug complex chip digital-on-top testbenches and seek root causes for failures.

Qualifications

  • BS and a minimum of 10 years relevant industry experience.
  • Strong fundamentals in analog/RF circuit theory/topologies.
  • Expert in RNM coding in SystemVerilog.

Skills

Required:RNM/SystemVerilogAnalog/RF modeling
Nice to have:AMS simulation environmentReading analog schematics

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • range of discounted products and free services
  • reimbursement for certain educational expenses including tuition
  • discretionary bonuses or commission payments (potential)
  • relocation assistance (potential)
  • Apple employee stock programs (discretionary stock units, stock purchase plan)
Last updated Sep 25, 2026. Interested? Apply on the company site.

About Apple

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