SoC Lead Engineer – LEC & Low Power Signoff
MarkhamCA$128k - CA$192kFull-timePosted 3w ago
About the role
Technical lead for Low Power Static Verification and Logical Equivalence Check (LEC) signoff in SoC development, owning end-to-end LEC signoff from RTL to post-P&R and guiding a small team through full-chip and tile-level verification.
Responsibilities
- Lead and own the full LEC signoff chain from RTL to physical netlist (RTL, post-synthesis netlist, post-DFT netlist, post-floorplan netlist, and post-P&R netlist)
- Drive full-chip top-level and tile-level low power static checks across all stages of the SoC design flow
- Debug and resolve logical equivalence and low power static check issues in synthesis and place-and-route flows
- Lead a small team, owning task delivery, milestone tracking, and issue resolution
- Guide team members on LEC strategy and track design changes across project phases
Qualifications
- BS/MS in Electrical Engineering, ECE, EEE, or related field
- Proven experience in SoC implementation and tapeout
- Demonstrated leadership owning and driving LEC and low power static verification to completion
- In-depth expertise in Logical Equivalence Check (LEC) and Low Power Static Verification
- Strong understanding of and hands-on coding experience in Verilog and VHDL
- Hands-on with industry-standard EDA tools: LEC - Synopsys Formality and/or Cadence Conformal; Low Power Static Signoff - Synopsys VC-LP (preferred) or Cadence Conformal Low Power (CLP); Synthesis - Design Compiler / Fusion Compiler; STA - PrimeTime; Place & Route - IC Compiler II / Fusion Compiler
- Solid understanding of low power design and UPF-based methodology, including UPF implementation and evolution across Synthesis and PnR flows
- Strong scripting skills (Tcl, Perl, Python)
- Leadership & Ownership – independent task driving and coordination with a small team
- Strong problem-solving and debugging skills
- Excellent communication, documentation, and teamwork
Skills
Required:Logical Equivalence Check (LEC)Low Power Static VerificationVerilogVHDLScripting
Benefits
- Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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