Technical Fellow - High-Speed Interconnect & Optics
Santa Clara, CA$284.8k - $427.2kFull-timePosted 3w ago
About the role
Senior technical leader defining and advancing AMD’s system-level interconnect architecture for next-generation AI, HPC, and data center platforms; drives innovation across electrical and optical interconnects, influences industry direction, and shapes AMD’s long-term technology roadmap.
Responsibilities
- Define next-generation interconnect architecture and long-term strategy for electrical and optical interconnects (including pluggable optics, co-packaged optics, co-packaged copper, and onboard optics) to enable scalable AI scale-up/scale-out systems.
Qualifications
- Deep expertise in high-speed signal integrity and power integrity (SI/PI, PDN) for advanced data rates (112G, 224G, and beyond).
- Strong experience across optical interconnect technologies, including: Pluggable optics (QSFP, OSFP); Co-Packaged Optics (CPO); Co-Packaged Copper (CPC); On-Board Optics (OBO).
- Proven experience in optical packaging and system integration, including silicon photonics, laser coupling strategies, and thermal and power management at scale.
- Hands-on experience with system bring-up, validation, and debug across ASICs, packages, boards, and optical subsystems.
- Strong understanding of SerDes architecture, equalization, FEC, and system-level channel modeling.
- Demonstrated ability to lead across organizational boundaries and influence vendors, partners, customers, and standards bodies.
- Track record of sustained technical leadership and architectural impact across multiple product generations.
- Recognized industry or academic thought leader; publications and patents a strong plus
Skills
Required:High-speed SI/PISerDes architectureOptical interconnect technologiesSilicon photonicsSystem bring-up and debugCross-functional leadership
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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