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Design Verification Infrastructure & Performance Engineer

AMD· Engineering
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Iasi, RomaniaFull-timePosted 3w ago

About the role

Silicon Design Engineer role focusing on optimizing simulation, build flows, and verification productivity for AMD’s silicon development. Collaborates across RTL, DV, and Infrastructure teams to improve workflows, performance, and automation in constrained-random and coverage-driven verification environments.

Responsibilities

  • Drive enhancements in simulation and build methodologies
  • Partner with RTL, DV, and Infrastructure teams to improve engineering workflows
  • Analyze simulation performance and identify runtime/memory bottlenecks
  • Develop automation and tools to detect inefficient coding practices
  • Coordinate with infrastructure engineers to adopt industry-standard workflows
  • Improve simulation speed in complex constrained-random and coverage-driven verification environments
  • Support continuous process and tool improvements across the silicon design ecosystem

Qualifications

  • BS in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field
  • Experience with scripting languages such as Python, Perl, Shell, and/or Ruby (preferred)
  • Understanding of object-oriented programming principles (preferred)
  • Experience with Unix/Linux systems (preferred)
  • Experience with Git and/or Perforce (preferred)
  • Knowledge of Verilog/SystemVerilog/UVM (preferred)
  • Exposure to simulation, build systems, or verification methodology optimization (preferred)
  • Knowledge of SQL/database administration is a plus (preferred)
  • LSF knowledge is a plus (preferred)

Skills

Nice to have:ScriptingObject-oriented programmingUnix/LinuxVersion controlVerilog/SystemVerilog/UVM

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 15, 2026. Interested? Apply on the company site.
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