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Silicon Design Engineer

AMD· Engineering
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Hybrid (Markham)CA$91.2k - CA$136.8kFull-timePosted 3w ago

About the role

ASIC Verification Engineering role within the Security IP Team (SECIP) focusing on co-verification of embedded microprocessor subsystems and accelerators in SoCs, with firmware development contributions for high-performance subsystems (security policy management, cryptography, data compression, DMA). Junior level, new grads welcome.

Responsibilities

  • Develop and verify embedded firmware for SoC secure boot and microprocessor-driven hardware acceleration services, including cryptography, compression, and DMA
  • Perform hardware/firmware co-verification using UVM System Verilog, C-DPI, and FPGA-based prototyping platforms
  • Define and maintain subsystem verification architecture, testbenches, and methodologies for embedded CPU and IP subsystems using AXI/AHB interfaces
  • Collaborate on subsystem specification and influence hardware and firmware co-design, including developing abstracted performance models and evaluating architecture trade-offs
  • Develop and execute block- and subsystem-level test plans using UVM randomized and C-DPI directed methodologies
  • Build and maintain verification infrastructure, including UVCs, system response models, integration scripts, and build/run environments
  • Drive verification closure, improve coverage metrics, and debug complex hardware/firmware interactions
  • Interface with SoC integration and DV teams to support IP-level APIs, SoC-level validation, emulation, silicon bring-up, and debug

Qualifications

  • Bachelor’s degree in electrical or computer engineering required; master’s or PhD preferred

Skills

Required:CC++SystemVerilogVerilogAXI/AHB/AMBA
Nice to have:Python

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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