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Sr. RTL Design Engineer

AMD· Engineering
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San Jose, CA$200k - $300kFull-timePosted 3w ago

About the role

Role within AMD’s FPGA Product and Platform development team, contributing to Adaptive & Embedded Computing Group (AECG) device programs from definition to productization with RTL design, EDA tools, and design automation support.

Responsibilities

  • Participate in all stages of the design flow, from RTL development through GDS implementation.
  • Design and implement RTL for complex digital and mixed-signal blocks using Verilog and System Verilog.
  • Support physical design activities, including synthesis, DFT implementation, place-and-route, and Static Timing Analysis (STA).
  • Collaborate closely with Functional Verification teams to support block-level verification using constrained-random and directed test environments based on System Verilog and UVM.
  • Utilize scripting languages such as Perl, Tcl, Shell, and Python to maintain existing design automation flows and develop new tools supporting various aspects of design implementation.
  • Partner with cross-functional teams across multiple engineering disciplines and geographic locations.
  • Communicate regularly with global project teams to resolve technical issues and ensure project milestones and objectives are achieved.

Qualifications

  • Bachelor's or master’s degree in electrical engineering, computer engineering, or a related field.

Skills

Required:RTL designVerilog/SystemVerilog
Nice to have:DFT/Synthesis/STAUVM/OVMScripting (Perl/Tcl/Shell/Python)
Last updated Oct 15, 2026. Interested? Apply on the company site.
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