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Physical Design Engineer

Apple· Hardware
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Cupertino, CA$174.1k - $225.3kfull-timePosted 3w ago

About the role

Analyze and perform static and dynamic power reduction of advanced node technology and complex SoC design. Implement low power design techniques to meet power targets. Execute floor planning, placement, routing, ECOs, and signoff activities to achieve tape-out goals. Develop CAD flows with scripting to improve automation and efficiency.

Responsibilities

  • Analyze and perform static and dynamic power reduction of the advanced node technology and complex SoC design.
  • Implement the low power design techniques and meet the power target goals.
  • Perform critical ECOs (Engineering Change Orders) to fix the identified violations from the analysis of all design aspects, such as Timing, Physical verification, Power Grid integrity, and Logic equivalent checks for design closure for tape out.
  • Perform scripting and programming for CAD tool flow development for automation problem solving and efficiency improvement.
  • Execute chip/partition floor planning, pin assignment, macro placement, and evaluation of logic placement to improve design power, performance and area.
  • Work with the logic design team to understand partition architecture and drive physical aspects early in the design cycle.
  • Complete netlist to GDS2 implementation for partition(s) meeting schedule and design goals.
  • Timing, physical and electrical verification and driving the signoff closure for the partitions.
  • Resolve and improve design and flow issues related to physical design, identify potential solutions, and drive execution.

Qualifications

  • Master's degree or foreign equivalent in Computer Engineering or related field and 3 years of experience in the job offered or related occupation.
  • Experience and/or education must include:
  • 1. Utilize Innovus or Fusion Compiler APR tools to perform implementation design, including applying these tools in physical design workflows and supporting execution of implementation design tasks.
  • 2. Tune implementation design flows and methodologies to improve the power, performance, and area of designs.
  • 3. Perform static timing analysis and apply timing convergence techniques, conduct IR/IVD analysis, implement violation fixes, and debug and resolve LVC/DRC violations.
  • 4. Perform physical design on advanced technology nodes (7nm and below), with knowledge of modern CMOS technology and fabrication fundamentals.
  • 5. Perform block level physical design, including floor planning, placement, clock tree synthesis, routing, and ECO step implementation.
  • 6. Utilize lower power design techniques, including clock gating, power gating, and multi-voltage domain design.
  • 7. Utilize scripting language, TCL, Perl, or Python to implement automatic techniques.
  • 8. Apply top down and bottom up design approaches and resolve interblock design issues related to timing and PDV related issues.

Skills

Required:Innovus or Fusion Compiler APRPower/Area/Performance tuningStatic timing analysis and timing closurePhysical design on advanced nodesFloor planning/placement/CT S/Routing/ECOPower techniquesScripting for automation

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • discounted products and free services
  • reimbursement for certain educational expenses including tuition
  • discretionary bonuses or commission payments as well as relocation
  • Apple stock purchase options via Employee Stock Purchase Plan
  • potential discretionary restricted stock unit awards
Last updated Oct 16, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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