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SoC DRAM Memory Subsystem Validation Engineering Program Manager

Apple· Hardware
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Hybrid (Cupertino, California), Hybrid (San Diego, California)Full-timePosted 3w ago

About the role

Program Manager for SoC DRAM Memory Subsystem validation and debug, responsible for bringing up memory subsystems, driving validation, debugging, and coordinating across multi-functional teams to deliver high-quality silicon from architecture to mass production, while influencing DRAM roadmap and technology adoption.

Responsibilities

  • Interface and drive memory related silicon issues across multi-functional teams: Design, Verification, Silicon Validation, Productization, System Hardware, and Software.
  • Drive debug activities in post silicon environments, root-cause problems and steer the team to the best corrective action to move forward.
  • Plan and lead adoption of DRAM technologies, custom package development and qualification process with multi-functional teams.
  • Work closely with the DRAM Global Supply Management (GSM), DRAM & Package Engineering and SoC Program Management organizations to set priorities.
  • Attend and drive technical sessions with DRAM vendors on new DRAM technology development to track and follow-up issues/action items and drive vendors to meet spec and schedule requirements.
  • Work with DRAM GSM and silicon material management teams to plan and track distribution of new DRAM material across all systems in development.
  • Enable tight collaboration between Design for Test (DFT), Product/Test/QA engineering, SiVal and Systems teams during NPI to finalize SoC performance targets and screen requirements.
  • Drive internal program process to guarantee high quality silicon execution.

Qualifications

  • BS + 10 years of relevant experience
  • Prior experience in SOC DRAM Memory Design, Validation, Architecture or Test/Product Engineering.
  • Knowledge of high-performance memory subsystem, including SoC memory architecture, sophisticated DDR controller, PHY design and high-speed IO interface, DRAM device, and associated calibration/training mechanisms.
  • Experience shipping high volume DRAMs / SoCs.
  • Previous experience working with major DRAM memory vendors and validation of DRAM device is also a plus.
  • Experience working in a high-energy multi-disciplined engineering environment, strong at multi-tasking, and real-time crisis management.
  • Excellent debugging skills. Proven track record to drive resolution of critical problems, while under pressure.
  • Ability to understand complex technical discussions and extract action plans.
  • Passionate to own/drive project development using well-defined metrics.
  • Thrives in dynamic schedule driven development environment.
  • Ability to succinctly summarize complex details for executive reporting.
  • Extraordinary leadership skills and ability to encourage team members with a dedication to see the bigger picture
  • Phenomenal leadership and social skills with a reciprocal approach.

Skills

Required:Memory subsystem expertiseDRAM validation and debuggingProgram managementCommunication to executives
Nice to have:Vendor collaboration

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • range of discounted products and free services
  • reimbursement for certain educational expenses including tuition
  • discretionary bonuses or commission payments as well as relocation (potential)
  • employee stock programs (RSUs)
Last updated Oct 2, 2026. Interested? Apply on the company site.

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