Sr. Debug Engineer - PCIe/CXL, RAS, Memory
Santa Clara, CA, Austin, TX, Bellevue, WA$200kFull-timePosted 2w ago
About the role
Senior Server Systems Debug Engineer role focusing on RAS, PCIe, Memory, MCA, and CXL with customer-facing debugging, verification, and collaboration across global teams to drive issue resolution for AMD server products.
Responsibilities
- Working on RAS, PCIe, Memory, MCA, CXL and Micro-Controller related failures with customers to get problems resolved
- Collaboration with AMD global teams to identify best solutions
- Providing validation and debug recommendations to customers for validation, new features and debug related questions
- Utilizing debug tools (e.g., debug scripts, protocol analyzers, SCAN and JTAG tools etc.) to narrow down and root cause customer failures
- Debugging issues found during the process, bring-up, validation, and production phases of SOC programs
- Engaging in other software/hardware/design teams
- Leading task force and collaborative approach with multiple teams
Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Skills
Required:RAS validation and debugPCIe/CXL functional and protocol debuggingMemory validation and debugProgramming/scripting (Python, C++, Perl, Ruby, etc)
Nice to have:MCA/MCE validation and debugPost-silicon validation methodologies
Benefits
- Benefits offered are described: AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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