Sr. Silicon Design Engineer
BangaloreFull-timePosted 2w ago
About the role
Senior RTL design role at AMD focusing on developing synthesizable RTL for IP cores, collaborating with architecture, verification, and SoC teams to deliver high-performance ASIC solutions for networking, security, storage, and related applications.
Responsibilities
- Develop synthesizable RTL for IP cores targeting advanced technology nodes
- Utilize modern AI tools to achieve a high level of RTL design productivity through code generation, refactoring, documentation, and debug
- Collaborate directly with IP Architecture, IP Verification, and SoC integration teams
- Contribute to design specifications for IP cores
- Resolve IP simulation regression failures through close collaboration with IP Verification Team and work with Verification Team members to ensure achievement of verification quality metrics
- Work with SoC team and Physical Design (PD) team to meet Power/Performance/Area goals by providing synthesis and timing closure support
- Support the activities of the Emulation Team
- Coach and mentor less experienced designers
- Attend and contribute to regular technical status meetings
Qualifications
- 6+ Years experience in RTL (Verilog / System Verilog) ASIC design experience through implementations targeting leading edge ASIC technologies
- Proven experience with industry-leading ASIC design tools, synthesis tools, flows, and timing closure
- Experience driving AI-powered tools (VS Code, GitHub Copilot, Cursor) that integrate LLMs (Claude, Codex/GPT) for RTL design
- Experience executing design checks such as lint, CDC, and LEC using industry standard ASIC tools
- Skilled in simulation and debugging with functional verification tools from Synopsys, Cadence, and/or Siemens (Mentor) including Gate-level simulations
- Excellent understanding of standard bus/interface protocols (i.e. AXI, AHB, AMBA)
- Experience in modern, complex networking architecture and digital design in general
- Experience with networking protocols (such as Ethernet) and standards for digital communication systems, optical communications, and packet processing applications
- Familiarity with encryption protocols (such as MACsec and IPsec) and security technologies for digital communication systems
- Proficient with workplace AI tools (Microsoft M365 Copilot, ChatGPT, Atlassian Rovo)
- Proficient with scripting languages such as Python, Perl, TCL, Makefile, and csh/bash
Skills
Required:VerilogSystemVerilogASIC toolchainNetworking protocols
Nice to have:Security protocolsAI-powered RTL design toolsPython, Perl, TCL, Makefile, shell
Benefits
- Benefits offered are described: AMD benefits at a glance.
Last updated Oct 15, 2026. Interested? Apply on the company site.
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