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Platform Validation Lead - IO Interfaces

AMD· Engineering
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Austin, TX$163.2k - $244.8kFull-timePosted 2w ago

About the role

Technical leadership role in AMD's datacenter CPU and AI post-silicon validation team, focusing on high-speed IO (PCIe, CXL, RAS) to drive system validation and debug of AI/GPU platforms. Leads validation planning, automation, and cross-domain collaboration in a datacenter environment.

Responsibilities

  • Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across AMD Server and AI products
  • Leverage AI/ML technologies to enhance post-silicon validation, debug, and test automation efficiency, including development of AI-assisted workflows, data analytics, failure triage, log analysis, and intelligent root-cause identification
  • Develop test content for focus testing as well as system level stress testing of IO domain plus cross product stress testing
  • Exposure to functionally validating, regressing, executing and debugging Networking/IFoE/IB/UAL/Scale up/Scale out or related domains
  • Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
  • Collaborate with partner organizations to provide root cause analysis for platform issues in a Data center environment. Drive the provide root cause analysis for platform level, SoC logical, performance and BIOS/firmware issues

Qualifications

  • Domain expertise in IO interfaces - PCIe, CXL, RAS, Power management drive comprehensive system level test-plan execution
  • Strong understanding of Server platform components, x86 or other complex CPU architectures. Proficiency with Linux and/or Microsoft Operating Systems is a plus
  • Experience developing validation test-plans, execution and strong debug skills at SoC/Platform level
  • Participated in silicon bring up and debug, support to internal engineering teams
  • Familiarity with programming / scripting language (C/C++, Python, Perl, ...)
  • Extensive experience with board/platform-level debug, including delivery, sequencing, analysis, and optimization
  • Experience with handling and taking captures using Oscilloscopes, protocol analyzers, and JTAG based Debug Tools
  • Excellent organizational skills and the ability to prioritize multiple workstreams and meet tight deadlines
  • Strong networking and relationship-building skills, with the ability to drive effective decision-making across various functions and levels within the organization
  • Knowledge of pre-silicon environments (Verification, Emulation, Virtual Bring-Up) is a plus

Skills

Required:Feature enablement and validation test planningIO domain validationSystem and SoC debug
Nice to have:AI/ML driven validation and automation

Benefits

  • Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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