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Lead System Development Engineer

AMD· Engineering
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HyderabadFull-timePosted 2w ago

About the role

Lead System Development Engineer to enable AI inference on AMD Versal AI Edge SoC platforms. Role spans system design, board bring-up, BSP integration, AI runtime enablement, and platform validation with a focus on system-level quality and customer readiness across hardware, firmware, and software layers.

Responsibilities

  • Design, implement, and verify FPGA/SoC subsystems for AI edge platforms, including hardware accelerator integration, IP configuration, and design bring-up
  • Profile and characterize hardware designs — timing closure, resource utilization, power analysis, and thermal behavior — and drive issues to resolution
  • Debug design-specific hardware issues using in-system debug tools (logic analyzers, hardware monitors, JTAG) and correlate findings across RTL, firmware, and software layers
  • Lead platforms bring-up activities for new AI edge SoC hardware, including boot flow validation, storage subsystem integration, and peripheral initialization
  • Integrate and validate AI inference runtimes and hardware accelerator stacks on embedded SoC targets, debug performance, correctness, and model deployment issues end-to-end
  • Support deep learning model compilation, quantization, and optimization workflows targeting embedded AI accelerators (NPU/DPU/spatial compute engines)
  • Develop and maintain Yocto-based embedded Linux — recipes, layers, rootfs configuration, and kernel/driver integration
  • Write tooling and automation to support hardware validation, device programming workflows, and CI/CD pipelines
  • Partner with hardware and silicon teams on system stability, power characterization, and platform validation
  • Contribute to technical documentation, release notes, and customer-facing enablement content

Qualifications

  • Hands-on FPGA/SoC design experience: RTL integration, IP configuration
  • Experience with FPGA design tools (Vivado or equivalent) for implementation, resource analysis, power estimation, and in-system debug
  • Proficiency with hardware profiling and characterization: performance benchmarking, power/thermal analysis, and design-specific bottleneck identification
  • Proficiency with low-level hardware debug tools: JTAG, in-system logic analyzers, hardware monitors, signal analyzers
  • Strong C/C++ development skills with emphasis on embedded and systems-level code quality
  • Experience with embedded NPU, DPU, or spatial/dataflow AI accelerators — integration, debugging, and performance tuning
  • Hands-on experience deploying AI inference frameworks on edge or embedded hardware — ONNX Runtime, TensorFlow Lite, TensorRT, or equivalent
  • Hands-on Yocto/Open Embedded and embedded Linux experience: BSP bring-up (bootloaders, device trees, kernel drivers), recipe authoring, layer customization, and rootfs configuration
  • Working knowledge of hardware acceleration concepts: DMA, memory-mapped I/O, PCIe, interrupt handling, shared memory buffers
  • Experience with GStreamer or comparable multimedia/dataflow pipeline frameworks for hardware-accelerated workloads is a plus

Skills

Required:FPGA/SoC designFPGA design toolsHardware profiling and characterizationJTAG / in-system debuggingC/C++ for embedded systemsYocto/Open Embedded / embedded LinuxHardware acceleration concepts
Nice to have:Embedded AI acceleratorsAI inference frameworks on edge

Benefits

  • AMD benefits at a glance (link provided in posting)
Last updated Oct 8, 2026. Interested? Apply on the company site.
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