Cores Verification Lead
Hybrid (Ontario)CA$187.2kFull-timePosted 2w ago
About the role
Senior verification lead focused on building and evolving scalable verification and build infrastructure for next-generation AMD CPUs, including Zen8/Zen9 programs. Leads design, development, and optimization of build systems, drives modernization, and collaborates with silicon design, CAD, and software teams to enable scalable, reliable, and efficient verification workflows.
Responsibilities
- Lead the design, development, and optimization of scalable build infrastructure to significantly reduce model build turnaround times and improve engineering productivity.
- Drive organization-wide build system modernization initiatives, enabling efficient support for Zen8, Zen9, and future CPU core development programs.
- Improve compute resource utilization and LSF farm efficiency through build caching, artifact reuse, and elimination of redundant build processes.
- Architect and implement hyperscale build solutions that enhance performance, reliability, and scalability across AMD's silicon design environments.
- Provide technical leadership and subject matter expertise for the transition from legacy build systems to next-generation build architectures.
- Partner with silicon design, CAD, infrastructure, and software engineering teams to define and execute long-term build and automation strategies.
- Establish best practices, standards, and roadmaps for build infrastructure, continuous integration, and large-scale engineering workflows.
Qualifications
- BS or MS with some industry experience desired (all degrees related to CS or EE).
- Deep expertise in build systems, build orchestration, and large-scale software or silicon development environments.
- Strong experience designing and operating distributed or hyperscale build infrastructure.
- Proven track record improving build performance, reducing turnaround time, and increasing engineering productivity at scale.
- Experience with compute farm scheduling technologies (e.g., LSF or similar workload management platforms).
- Strong understanding of build caching, artifact management, dependency optimization, and build reproducibility techniques.
- Experience supporting semiconductor design workflows, EDA environments, or chip development programs.
- Demonstrated ability to lead complex infrastructure transformation initiatives across multiple engineering organizations.
- Excellent collaboration and communication skills with the ability to influence technical direction across cross-functional teams.
- Experience driving automation, CI/CD, and infrastructure scalability in high-performance engineering environments.
Skills
Required:Build systemsDistributed / hyperscale build infrastructureBuild caching / artifact management
Nice to have:Compute farm scheduling (e.g., LSF)
Benefits
- AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
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