CPU RTL Design Engineer
Austin, TX$121.7k - $182.5kFull-timePosted 2w ago
About the role
CPU Core RTL Design Engineer responsible for designing and optimizing next-generation processor cores within the central core RTL team, supporting client, server, and AI platforms. Collaborates with architecture, verification, performance, and physical design teams to deliver high-performance, power-efficient CPU core subsystems and microarchitecture features.
Responsibilities
- Design and implement RTL for CPU core pipeline components and related logic
- Contribute to microarchitecture definition for next-generation processor cores
- Collaborate with architecture, verification, performance, and physical design teams to deliver optimized designs
- Analyze and improve performance, power, area, and timing characteristics
- Support design verification, synthesis, timing closure, and physical design efforts
- Investigate and resolve pre-silicon and post-silicon issues
- Partner with cross-functional teams to evaluate design alternatives and align on technical trade-offs
- Contribute to scalable RTL methodologies, libraries, tools, and engineering best practices
Qualifications
- Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
- Experience with Verilog/SystemVerilog RTL development in CPU, SoC, ASIC, or comparable digital design environments
- Understanding of modern CPU architecture, including out-of-order processor concepts
- Experience with logic design and high-performance processor pipeline development
- Experience with load/store, decode, execution, scheduling, or other CPU core subsystems
- Knowledge of power-efficient and low-power design techniques, including timing and power optimization
- Familiarity with synthesis, place-and-route, static timing analysis, and timing closure
- Experience debugging and optimizing designs in collaboration with performance and verification teams
- Exposure to multiple stages of the product development lifecycle, including architecture, implementation, verification, or post-silicon debug
- Familiarity with physical design, scripting such as Python or Tcl, and concepts such as DFT, clocking, reset, and power management
- Relevant experience in processor, accelerator, SoC, or other complex digital design environments may also be considered
Skills
Required:Verilog/SystemVerilogCPU architectureDigital design
Nice to have:Performance/power optimizationSynthesis/Place-and-Route/STADebugging cross-teamPython/Tcl scripting
Benefits
- AMD benefits at a glance
Last updated Oct 8, 2026. Interested? Apply on the company site.
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