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PNR CAD SILICON DESIGN ENGINEER

AMD· Engineering
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HyderabadFull-timePosted 2w ago

About the role

CAD Engineer role focused on developing Place and Route (PnR) methodologies for advanced technology nodes (3nm & 2nm) at AMD, coordinating with global design teams, automating PnR flows, and working with EDA vendors to optimize power, performance, and area (PPA) for SOC implementations.

Responsibilities

  • Responsible for developing Place and Route methodologies for various designs at advanced technology nodes
  • Work seamlessly with synthesis and signoff (STA, extraction, Physical Verification) teams to achieve best-in-class PPA
  • Drive power/performance/area (PPA) convergence for SOCs implementation
  • Script out utilities to automate different stages of the implementation flow
  • Support design teams at global sites through multiple PnR flow stages including chip finish flows
  • CAD flow and Methodology development on advanced process nodes such as 3nm, 2nm are preferred

Qualifications

  • Master’s/Bachelor’s Degree in Electronics Engineering (Minor in Computer Science preferred)
  • 8-10 years of experience in CAD flow and methodology development on advanced nodes such as 3nm & 2nm
  • Work closely with design teams to support multiple areas through Netlist to GDSII implementation
  • Strong problem-solving skills and analytical thinking
  • Team player, good work ethic, and excellent communication skills

Skills

Required:Place and Route (PnR) methodologiesScripting (Python, TCL)
Nice to have:InnovusFusion CompilerUPF/power-gating conceptsPython

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 22, 2026. Interested? Apply on the company site.
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