← All roles

DFT/DFx Architecture & RTL Lead

AMD· Engineering
Apply on company site
Santa Clara, CA$232k - $348kFull-timePosted 2w ago

About the role

Lead DFT/DFx methodology, architecture, and RTL execution for high-speed SerDes PHYs, Memory PHYs, and die-to-die interconnect IPs; own RTL implementation, methodology development, test constraints, ATPG support, and post-silicon debug in collaboration with cross-functional teams.

Responsibilities

  • Define and lead PHY-specific DFT/DFx architecture and methodology for high-speed SerDes, Memory PHY, and die-to-die interconnect IPs.
  • Implement DFT/DFx features in RTL using Verilog/SystemVerilog.
  • Develop and support DFT micro-architecture, including scan architecture, test modes, clocking, reset, isolation, bypass, and observability features.
  • Support JTAG/IJTAG, ICL/PDL, scan compression, at-speed scan, and hierarchical DFT implementation.
  • Support Siemens Tessent-based or equivalent industry-standard DDF flows for ATPG, pattern generation, pattern validation, and debug.
  • Support scan stitching, scan-readiness checks, test coverage analysis, and DFT rule/debug closure.
  • Develop and maintain DFT timing constraints, test-mode constraints, and integration guidelines compatible with front-end and physical design flows.
  • Perform gate-level simulation and debug using tools such as Synopsys VCS and Verdi or comparable tools.
  • Drive SpyGlass or equivalent lint/DFT-readiness analysis to identify gaps in scan, controllability, observability, and test coverage.
  • Plan, implement, and verify MBIST-related features for embedded memories.
  • Support ATPG pattern generation, simulation, debug, and delivery to test engineering.
  • Partner with Test Engineering and Product Engineering on silicon bring-up, tester pattern debug, diagnosis, and yield-learning activities.
  • Develop efficient and reusable DFx flows, scripts, checkers, and methodologies for IP-level and SoC-level integration.

Qualifications

  • Relevant industry experience in DFT, DFx, RTL design, semiconductor IP development, or SoC test methodology.
  • Understanding of DFT architecture and micro-architectures, including scan, compression, test clocks, test resets, lock-up latches, clock gates, scan anchors, and test access mechanisms.
  • Hands-on experience with Siemens Tessent DFT flows or comparable industry-standard DFT tools.
  • Experience developing or supporting hierarchical DFT flows for complex SoCs or reusable IPs.
  • Hands-on RTL coding experience in Verilog and/or SystemVerilog.
  • Experience with industry-standard ATPG, scan insertion, and DFT implementation tools.
  • Familiarity with JTAG, IJTAG, ICL/PDL, scan compression, at-speed scan, and hierarchical DFT concepts.
  • Experience with gate-level simulation, debug, and waveform analysis using tools such as Synopsys VCS and Verdi.
  • Experience analyzing DFT readiness, lint, controllability, observability, and test coverage issues.
  • Understanding of MBIST planning, implementation, verification, and debug.
  • Understanding of low-power design concepts (power gating, multi-voltage domains, multi-Vt, isolation, retention, voltage scaling).
  • Understanding of high-performance and low-power digital design fundamentals.
  • Knowledge of fault models (stuck-at, transition, path delay, gate-exhaustive, IDDQ, cell-aware).
  • Ability to investigate and resolve issues across RTL, gate-level netlists, constraints, patterns, and silicon behavior.
  • Effective communication and cross-functional collaboration skills.
  • Candidates encouraged to apply even if not experienced with every tool; relevant alternative tools considered.

Skills

Required:DFT/DFx architectureVerilog/SystemVerilogATPG and DFT toolsGate-level simulationScan architecture and test modes
Nice to have:MBISTJTAG/IJTAG/PDL

Benefits

  • AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
AMD logo

About AMD

together we advance_AI

AMD delivers leadership high-performance and adaptive computing solutions to advance data center AI, AI PCs, intelligent edge devices, gaming, & beyond.

AIData CenterHigh-Performance ComputingGamingEdge Devices
Company profileWebsite

More open roles at AMD