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Lead DFT DV Engineer

AMD· Engineering
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HyderabadFull-timePosted 2w ago

About the role

We are looking for an adaptive, self-motivated DFT engineer to join AMD's DFT team. The role focuses on driving and improving verification capabilities for high-quality, industry-leading technologies, with emphasis on DFT, SCAN, MBIST, and JTAG verification, across multi-die scenarios and scalable SystemVerilog/UVM verification platforms.

Responsibilities

  • Develop scalable verification platform in System Verilog / UVM. Able to guide team in writing assertions and checkers.
  • Be responsible for a comprehensive verification plan and drive the implementation of verification tests
  • Responsible for SCAN, MBIST and JTAG verification
  • Work closely with design /arch team to prepare test list and complete the verification with all planned tests
  • Develop and improve DFT clocking and topology covering MBIST, JTAG verification, scan dump, understanding on ICL/PDL, debug scenarios like clock observation and analog observation, BScan, HSIO tests experience
  • Collaborate with team across sites/timezones to deliver high-quality verification flows

Qualifications

  • Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering

Skills

Required:DFT clockingSystemVerilog / UVMTest planningCommunication
Nice to have:Multi-die verification

Benefits

  • AMD benefits at a glance
Last updated Oct 8, 2026. Interested? Apply on the company site.
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