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Lead DFT Engineer

AMD· Engineering
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HyderabadFull-timePosted 2w ago

About the role

We are looking for an adaptive, self-motivated DFT engineer to join AMD's DFT team. The role focuses on driving and improving AMD's design-for-test capabilities, with emphasis on scan-based techniques, ATPG, and post-silicon support to deliver high-quality, industry-leading technologies.

Responsibilities

  • Responsible for scan patterns generation, verification, delivery to Post silicon team and also support for post silicon debug
  • Hands on experience on SSN, OCC, TAP verification (1838, 1149.1, 1687), ICL simulations, Pattern retargeting, timing and no-timing simulations, Post silicon debug
  • Experience in scan-stitching and related concepts
  • Excellent hands-on ATPG; proficient with files required to run ATPG
  • Knowledge/experience with Tessent ATPG (mentor) is a plus
  • Experience with post-silicon bring up is a plus
  • Collaborate with engineers across sites/timezones and communicate effectively

Qualifications

  • Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering

Skills

Required:Scan patterns generationDFT verificationATPG
Nice to have:Post-silicon bring-upScan-stitching

Benefits

  • Benefits offered are described: AMD benefits at a glance.
Last updated Oct 8, 2026. Interested? Apply on the company site.
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