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Analog Layout Automation Engineer

Apple· Hardware
Apply on company site
Hybrid (Austin, Texas), Hybrid (Beaverton, Oregon), Hybrid (Cupertino, California), Hybrid (Melbourne, Florida), Hybrid (Waltham, Massachusetts)Full-timePosted 2w ago

About the role

Join Apple's Silicon Engineering Group to contribute to the evolution of Analog/Mixed-Signal (AMS) circuits with a focus on automation and AI/ML techniques for layout design, verification, and optimization across SerDes, PLLs, and sensors.

Responsibilities

  • Convert design concepts into silicon by collaborating with circuit designers and using advanced CAD tools to create high-performance analog and mixed-signal layouts, including AI-powered tools.
  • Review floor plans, analyze circuits, run verification suites, and resolve LVS/DRC/ERC issues to deliver next-generation SOCs.
  • Drive automation by developing scripts, improving workflows, and applying AI/ML for layout optimization, verification acceleration, advanced modeling, intelligent quality metrics, reduced manual effort, and data-driven design insights.

Qualifications

  • BS and a minimum of 10 years relevant industry experience.
  • Experience designing analog and mixed-signal layouts in deep-submicron CMOS and FinFET technologies.
  • Strong programming/scripting skills in SKILL, Perl, TCL, Shell, and/or Python, with emphasis on layout automation, productivity tooling, and data analysis.
  • Solid understanding of supervised and self-supervised learning, CNNs, and core training concepts such as loss functions, backpropagation, and optimization.
  • Hands-on experience with PyTorch for model development and experimentation.
  • Demonstrated ability to automate layout tasks, flows, and quality checks using scripting and CAD tools.
  • Proven record in implementing high-quality analog layouts with tight device matching, low noise, and low power consumption.
  • Familiarity with failure-prone circuit/layout structures, analog and DFM best practices, and the ability to diagnose and resolve layout-related issues.
  • Strong proficiency in custom and standard-cell floor planning, hierarchical layout assembly, and physical integration.
  • Understanding of image processing fundamentals, spatial representations, multi-channel image handling, segmentation, and object detection concepts.
  • Technical understanding of IR drop, RC delay, electromigration, self-heating, coupling capacitance, and related reliability concerns.
  • High proficiency in interpreting physical verification reports, including DRC, ERC, and LVS.
  • Experience using advanced Cadence Virtuoso features (XL, EAD, APR, Constraint Manager), and familiarity with Cadence Innovus.
  • Experience with CAD automation workflows and PCell creation.
  • Excellent communication skills and the ability to work effectively with cross-functional teams.

Skills

Required:Analog/mixed-signal layout designProgramming/scripting for automationAI/ML for layout
Last updated Oct 16, 2026. Interested? Apply on the company site.

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