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Physical Design Signoff Engineer

Apple· Hardware
Apply on company site
Austin, TXfull-timePosted 2w ago

About the role

Drive the final verification stage of SOC design and own signoff closure for blocks and full-chip designs, ensuring silicon is ready for production through timing, power, and manufacturing criteria. Define signoff criteria, develop automation and dashboards, and partner with PNR, CAD, Technology, and Power teams to maintain consistent methodology across tools and flows.

Responsibilities

  • Define and own the signoff criteria for PD/PNR designs across static timing analysis, signal integrity, EMIR, and clock construction and simulation
  • Drive signoff reviews with design teams through readiness assessment, closure of open items, and alignment of methodology across groups
  • Develop and maintain signoff checks, scripts, automation, and dashboards used for verification and metric tracking
  • Enable and support design teams on signoff infrastructure
  • Perform flow signoff to verify that CAD flows are generating correct results
  • Partner cross-functionally with PNR design, CAD, Technology, and Power teams to keep methodology consistent and grounded in tool capabilities
  • Own signoff closure for blocks and full-chip designs and ensure readiness for tape-out
  • Debug timing or IR drop violations and set the bar for block completion

Qualifications

  • BS in Computer Science or related field with 10+ years of relevant industry experience
  • Proficient in programming using Python, Perl or Tcl
  • Hands-on experience with industry PNR and timing tools such as Cadence Innovus, Synopsys ICC2 / Fusion Compiler, PrimeTime, or Tempus
  • Experience taking block-level or chip-level designs through physical implementation and signoff closure on production silicon
  • Experience in timing closure, signal integrity, low-power design techniques, and clock-tree construction
  • Excellent communication skills and ability to collaborate across design, CAD, and technology teams
  • Understanding of tradeoffs to meet PPA (power, performance, area) targets, and experience defining implementation recipes to improve PPA

Skills

Required:Static timing analysisSignal integrityEMIRClock construction and simulationPythonCadence InnovusSynopsys ICC2 / Fusion CompilerPrimeTime
Nice to have:Perl/TclTempus
Last updated Oct 9, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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