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Physical Design Lead

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San FranciscoFull-timePosted 2w ago

About the role

Phinity is an AI research lab focused on solving chip design. We enable AI agents to tape-out chips autonomously, from architecture to post-silicon, by building RL environments, agent infrastructure, and evaluation systems. The Physical Design Lead will drive PD flows and optimization from block-level to full-chip, defining synthesis-to-layout processes and delivering tapeout-ready designs optimized for target PPA.

Responsibilities

  • Leading PD flows and optimization of block-level to full-chip level optimizations
  • Define Synthesis to layout flows, including PDN, clock-trees, PVT corners and custom cell definitions. Responsible for implementing characterization flows for custom cells and memory blocks.
  • Responsible for executing IP and Fullchip design optimizations working with PD engineers. Identify areas of optimization in design utilization, power grid and clock network within the design.
  • Responsible for delivering tapeout ready design optimized for the target PPA, and utilizing the in-house capability on prompt-to-GDS.

Skills

Required:Physical Designtapeout optimizationSynthesis to layout flows

Benefits

  • Health insurance
  • Retirement plans
  • Unlimited PTO
  • Paid parental leave
  • Lunch and dinner provided in-office
Last updated Oct 11, 2026. Interested? Apply on the company site.

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