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IOHUB Design Verification Engineer

AMD· Engineering
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Hybrid (Markham, ON or Vancouver, BC)CA$128kFull-timePosted 1w ago

About the role

Role focusing on IOHUB (IOHUB Core and IOMMU) verification strategy, test plan development, and collaboration with global teams to verify PCIe/I/O interfaces for AMD NBIO IP across multiple product lines.

Responsibilities

  • Define the IOHUB verification strategy and scope.
  • Develop the IOHUB test plan, implement DRVR, and drive verification closure.
  • Work closely with the Design and Architecture teams to develop new verification components.
  • Organize and attend conference calls with global teams for strategy alignment, status synchronization, and related activities.

Qualifications

  • Master’s degree in electrical engineering and digital ASIC or SoC design verification experience, or
  • Bachelor’s degree in electrical engineering and digital ASIC or SoC design verification experience.

Skills

Required:UVMVerilog/SystemVerilogConstrained-random verificationCoverage-based verificationTeam collaboration
Nice to have:SystemCPSL/SVA assertionsVerification planningAI assistant development

Benefits

  • AMD benefits at a glance (link provided in job description)
Last updated Oct 22, 2026. Interested? Apply on the company site.
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