Senior ASIC RTL Design Engineer, AI Networking IP
Hybrid (Ottawa, ON; Markham, ON)CA$128kFull-timePosted 1w ago
About the role
ASIC RTL Design Engineer to develop high-performance networking and communications IP for advanced AMD products. Focus on Verilog RTL, front-end design, and integration with IP Architecture, Verification, and SoC teams to deliver high-quality IP cores for networking, security, storage, and related applications.
Responsibilities
- Develop synthesizable RTL for IP cores targeting advanced technology nodes
- Utilize modern AI tools to achieve a high level of RTL design productivity through code generation, refactoring, documentation, and debug
- Collaborate directly with IP Architecture, IP Verification, and SoC integration teams
- Contribute to design specifications for IP cores
- Resolve IP simulation regression failures through close collaboration with the IP Verification Team and work with Verification Team members to ensure achievement of verification quality metrics
- Work with the SoC and Physical Design (PD) teams to meet Power/Performance/Area goals by providing synthesis and timing closure support
- Support the activities of the Emulation Team
- Coach and mentor less experienced designers
- Attend and contribute to regular technical status meetings
Qualifications
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Skills
Required:Verilog/SystemVerilog RTL designASIC front-end designASIC design tools (synthesis, timing, lint/CDC/LEC)
Nice to have:AI-powered design toolsSimulation and debugging toolsBus/interface protocolsNetworking/high-speed interfacesEncryption protocolsScripting languages
Benefits
- Benefits offered are described: AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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