Software Development Engineer - C++, Networking
Santa Clara, CA$240kFull-timePosted 1w ago
About the role
Senior technical leadership role driving end-to-end delivery of scale-up networking and GPU software stack for AMD Instinct GPUs, spanning architecture, firmware, drivers and ROCm stack for rack-scale AI systems.
Responsibilities
- Scale-up networking: define and drive software architecture for scale-up switch fabrics connecting AMD Instinct GPUs within a rack-scale system, including Ethernet-based fabrics and emerging standards such as UALink and Ultra Ethernet.
- Lead switch software integration (e.g., SONiC, SAI, switch SDKs), including link bring-up, SerDes/retimer tuning, FEC/BER characterization, topology discovery, routing, congestion management and telemetry.
- GPU firmware: architect and develop GPU firmware components (system management, power/thermal, security, RAS, fabric/link management), and drive firmware packaging, update flows (PLDM/Redfish) and BMC integration.
- Drivers: lead development and optimization of Linux kernel drivers for Instinct GPUs (amdgpu/KFD), including memory management, GPU-to-GPU communication over the scale-up fabric, partitioning, virtualization, error handling and recovery.
- Software stack: drive enablement and performance of the ROCm stack on scale-up systems, including runtime, communication libraries (RCCL), and integration with PyTorch, JAX and inference serving engines (e.g., vLLM, SGLang).
- Own new-platform bring-up from pre-silicon (emulation/simulation) through first silicon, system integration, and production qualification.
- Lead cross-layer debug and root-cause analysis of complex issues spanning silicon, firmware, driver, fabric and application layers.
- Define performance, reliability and scalability goals for collective communication and multi-GPU workloads, and drive optimizations to meet them.
- Collaborate with silicon architects, hardware, switch, cloud/OEM partners and customers to influence product roadmaps and strategic technical decisions.
- Mentor engineers, set technical direction and engineering best practices, and coordinate execution across globally distributed teams.
Qualifications
- Extensive experience in system software development for GPUs, accelerators, NICs or network switches.
- Strong background in data center networking: Ethernet (L1–L3), high-speed SerDes, FEC, RDMA/RoCE, congestion control, and switch ASIC programming (e.g., Broadcom SDK, SAI, SONiC).
- Familiarity with scale-up interconnects and fabrics such as UALink, Ultra Ethernet, AMD Infinity Fabric™, NVLink or similar.
- Hands-on experience with firmware development for SoCs or accelerators, including embedded C/C++, boot flows, power management, security, and BMC/out-of-band management (Redfish, PLDM, MCTP).
- Strong Linux kernel and device driver development experience (PCIe, DMA, IOMMU, memory management, interrupt handling).
- Knowledge of GPU architecture and GPU software stacks (ROCm/HIP, CUDA, or similar), and of collective communication libraries (RCCL/NCCL, MPI).
- Familiarity with deep learning frameworks (e.g., PyTorch, JAX, TensorFlow) and distributed training/inference at scale.
- Proven track record of leading new hardware platform bring-up and debugging complex hardware/software interactions using tools such as JTAG, protocol analyzers and logic analyzers.
- Proficiency in C/C++ and Python; experience with Go or Rust a plus.
- Experience setting technical direction and influencing across multiple teams and organizations.
- Excellent communication, collaboration and leadership skills.
- Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline; PhD a plus.
Skills
Required:GPU system softwareData center networkingLinux kernel & driversGPU software stacksProgramming languages
Nice to have:Scale-up interconnectsFirmware developmentDeep learning frameworks
Benefits
- AMD benefits at a glance
Last updated Oct 15, 2026. Interested? Apply on the company site.
About AMD
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