STA Engineer - EDA/CAD Flow : Software Development Engineer
HyderabadFull-timePosted 1w ago
About the role
Software engineer role focused on RTL design, timing analysis, and EDA/CAD flow to achieve timing closure in STA-driven digital design environments at AMD.
Responsibilities
- The candidate should have a solid understanding of RTL coding styles
- STA and Timing Constraint Concepts
- Place and route algorithms and applications.
- The candidate will be responsible for creating complex designs, debugging P & R issues and will work to achieve timing closure.
Qualifications
- BS or MS in EE or CE with 2-3 years of experience in Digital Design and Static Timing Analysis
- Strong background in RTL design using Verilog/VHDL
- Exposure to timing closure concepts with foundations in timing analysis & digital design
Skills
Required:RTL coding stylesSTA and Timing Constraint ConceptsPlace and route algorithms and applications
Nice to have:Scripting language (TCL, Perl, Python)
Benefits
- AMD benefits at a glance (link provided)
Last updated Oct 22, 2026. Interested? Apply on the company site.
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