Wireless SoC Design Verification Engineer
About the role
Wireless SoC Design Verification Engineer focused on pre-silicon RTL verification of wireless subsystems, SoC sub-systems, and chip-level functionality, with opportunities for block, sub-system, or chip-level verification and end-to-end data/control path simulations. Collaborates with DV methodologists, designers, and systems engineers to develop reusable testbenches and verification environments using metric-driven verification.
Responsibilities
- Own critical block and sub-system verification of wireless SoC projects
- Architect and develop testbenches and environments, by using state-of-the-art verification methodologies
- Define verification plan, create, simulate and debug test scenarios
- Drive regression and coverage analysis to ensure high quality DV
- Collaborate with design and systems engineering teams to review requirements, specifications and architecture, extract features and define DV attribute
Qualifications
- BSc or MSC in Electrical Engineering or Computer Engineering
- 5+ years of verification experience
- Solid verification skills in problem solving, constrained random testing, and debugging
- Advanced knowledge of SystemVerilog and DV methodologies
- Self-motivated and dedicated with proven creative thinking capabilities
- Ability to handle multiple tasks and prioritise work to meet deadlines
Skills
About Apple
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Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.
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