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Early Career - Front-End Implementation Engineer (Synthesis)

Apple· Hardware
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Hybrid (London)Full-timePosted 1w ago

About the role

Front-End Implementation Engineer focused on PPA optimization and netlist quality for Apple Silicon GPUs, collaborating with RTL and Physical Design teams to deliver high-performance GPUs.

Responsibilities

  • PPA optimisation of the netlist
  • Collaborate with RTL and Physical Design teams
  • Deliver key netlist quality milestones for partition
  • Understand and improve current methodologies
  • Deliver outstanding GPUs for consumer products
  • Collaborate with IP teams across multiple sites

Qualifications

  • Minimum of BSc in Electrical Engineering (EE)
  • Exposure to Verilog and/or System Verilog and scripting languages
  • General understanding of physical synthesis, including logic and PPA optimisation techniques
  • Understanding and application of physical design and static timing analysis principles
  • Familiarity with DFT insertion
  • Familiarity with reset domain, multi-clock domain, multi-power domain (UPF), linting tools and concepts across RTL and Gate-Level
  • Ability to analyze critical paths and guide RTL designs to efficient solutions
  • Collaborate optimally with IP teams spanning multiple sites

Skills

Required:VerilogSystemVerilogscripting languagesPhysical synthesisPhysical designRTL analysisCollaboration across sites
Nice to have:DFT insertionReset domain / Multi-clock domain / UPF
Last updated Oct 16, 2026. Interested? Apply on the company site.

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