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Wireless Design Verification Engineer

Apple· Hardware
Apply on company site
Hybrid (San Diego, CA and Sunnyvale, CA)$122.7k - $214.3kFull-timePosted 1w ago

About the role

Join Apple's Wireless Connectivity team to verify state-of-the-art WiFi SoCs through digital verification, testbenches, and cross-functional collaboration, ensuring first-time-right silicon success for multi-gigabit wireless technology.

Responsibilities

  • Verify Radio digital controllers or subsystems from test planning, environment bring-up, through feature closure.
  • Develop UVM testbench environments, bus functional models, and infrastructure for radio control and datapath subsystems.
  • Implement constrained random scenarios exercising radio protocols, control sequences, and state machine interactions.
  • Collaborate on digital + mixed-signal verification using SystemVerilog analog behavioral and/or DMS/real-number models to validate radio control paths.
  • Drive closure by tracking regressions, debugging issues, and addressing coverage gaps.
  • Partner with cross-functional Design, RF, and Systems teams to define verification strategy.
  • Develop Python automation supporting verification flows and regression infrastructure.

Qualifications

  • Minimum requirement of a bachelor’s degree.
  • Understanding of ASIC verification flows with SystemVerilog including UVM testbench development, scenario creation, and RTL simulation.
  • Experience developing verification environments, bringing up designs in simulation, and debugging functional issues.
  • Experience with digital design fundamentals Verilog or VHDL.
  • Experience with scripting languages such as Python, or similar.
  • Strong problem-solving abilities and collaborative approach to engineering challenges.
  • Experience with digital controllers, subsystems, or data paths.
  • Experience with constrained random testing, functional coverage implementation, UVM methodology, and assertion-based verification.
  • Exposure to mixed-signal modeling concepts including real-number modeling.
  • Exposure to RF/analog system design such as LNAs, Mixers, PLLs, amplifiers, LDOs, DAC / ADCs.
  • Proficiency with Python, Perl, Bash or similar scripting for automation.
  • Great teammate with excellent communication skills and desire to seek diverse technical challenges.

Skills

Required:SystemVerilogUVMRTL simulationPythonVerilog/VHDL
Nice to have:Mixed-signal modeling

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • discounted products and free services
  • reimbursement for certain educational expenses — including tuition
  • potential discretionary bonuses or commission payments
  • relocation assistance
Last updated Oct 16, 2026. Interested? Apply on the company site.

About Apple

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