Senior Forward Deployed Engineer (FDE) for AI and GenAI Inference Optimization
RiyadhFull-timePosted 5d ago
About the role
Senior Member of Technical Staff on the Forward Deployed Engineering team focused on enabling, optimizing, and deploying GenAI inference workloads on AMD data center CPUs and GPUs, bridging AI models with AMD hardware to achieve competitive performance.
Responsibilities
- Partner directly with customers to enable and optimize large language models (LLMs) and multimodal models on AMD Instinct GPUs, meeting committed performance and accuracy targets.
- Optimize GenAI inference pipelines on vLLM and SGLang, including PD disaggregation, expert parallelism (EP/wide-EP), tensor/data parallelism, speculative decoding, and KV cache management.
- Develop and tune low-level GPU kernels (Triton, HIP, composable kernels) for attention, MoE, GEMM, quantization, and normalization operations.
- Profile end-to-end workloads, identify bottlenecks across GPU/CPU boundaries, and deliver measurable throughput and latency improvements versus competitive targets.
- Enable advanced data types and techniques (FP8, MXFP4, sparse attention) with a focus on both performance and numerical accuracy.
- Debug complex runtime, stability, and accuracy issues in production environments; partner with core engineering teams to identify root causes and contribute fixes.
- Contribute optimizations back to open-source frameworks (vLLM, SGLang, ATOM, AITER) and internal libraries; document best practices and deliver production-ready artifacts to customers.
- Leverage AI-assisted coding tools and agentic workflows to accelerate development, debugging, optimization, and code review across the inference stack.
Qualifications
- BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field, 8+ years of relevant experience.
- Deep expertise in GPU architecture and performance optimization, including hands-on experience with AMD ROCm (or CUDA) and GPU kernel development.
- Strong proficiency in Python and C++, with experience developing and optimizing kernels using Triton, HIP, or CUDA.
- Experience with AI-assisted coding and agentic development tools (e.g., GitHub Copilot, Claude, Cursor, or equivalent) to enhance productivity in kernel development, large-scale codebase navigation, debugging, and framework integration.
- Experience working with LLM inference frameworks (vLLM, SGLang, or equivalent) and serving optimization techniques.
- Solid understanding of transformer and MoE architectures, quantization, and distributed inference strategies (TP, DP, EP, and related parallelism techniques).
- Proficiency with profiling and debugging tools (e.g., rocProfiler, ROCdebug-agent).
Skills
Required:Large language models (LLMs) and multimodal models optimizationGPU kernel development (Triton, HIP, CUDA)GPU/CPU performance profilingPythonC++AI-assisted coding toolsLLM inference frameworksTransformer/MoE architectures, quantizationProfiling/debugging tools
Benefits
- AMD benefits at a glance
Last updated Oct 22, 2026. Interested? Apply on the company site.
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