SerDes Silicon Design and Micro-Architecture Engineer
Hybrid (San Jose, CA)$188.2k - $282.2kFull-timePosted 5d ago
About the role
Role focused on analog/mixed-signal transceiver design and micro-architecture for high-performance SerDes technology in AMD’s transceiver group; requires strong expertise in ultra-high-speed electrical/optical PHY design, collaboration across teams, and involvement from architecture through silicon validation.
Responsibilities
- Lead transceiver micro-architecture definition, modeling, simulation, implementation, and verification: Tx and Rx analog front-end blocks, clocking circuits, DSPs, CDR, adaptation and calibration loops, firmware loops, system level interface
- Work with pre-tapeout verification for silicon design sign-off and post-silicon validation teams to bring up silicon and analyze volume productization data
Qualifications
- Ph.D in electrical engineering or related fields with industrial experience or M.S. with relevant industrial experience in optical and/or electrical transceiver design and architecture
- Excellent communication and documentation skills
Skills
Required:Design specification and micro-architecture documentation
Nice to have:Top-level and block-level electrical/optical link budgeting and modeling
Last updated Oct 22, 2026. Interested? Apply on the company site.
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