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PHY Design Verification Engineer

Apple· Hardware
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Hybrid (San Diego, California; San Francisco Bay Area, California), Remote$122.7k - $214.3kfull-timePosted 3d ago

About the role

Pre-silicon RTL verification of wireless PHY and interfaces within Apple’s wireless SoC, collaborating with DV methodologists, designers, and systems engineers to develop reusable testbenches, achieve coverage targets, and apply metric-driven verification for energy-efficient wireless silicon.

Responsibilities

  • Work closely with the system and design teams to review and understand the PHY subsystem microarchitecture, and create verification plans from specifications, review and refine to achieve coverage targets.
  • Build block/subsystem level test benches with a reference model, using the best-in-class DV methodology. Architect test benches with maximum reusability in mind.
  • Develop and execute both directed and constrained random tests, debug failures, manage bug tracking, and work with designers to drive closure of issues found.
  • Create and analyze block/subsystem-level coverage models, and add test cases to increase coverage.
  • Use machine learning and AI technologies to identify design and test bench issues and ensure DV quality.
  • Support PHY subsystem validation using Palladium and/or FPGA.
  • Work with team members to improve DV methodology and flow.

Qualifications

  • Minimum requirement of a bachelors degree
  • Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
  • Excellent knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.
  • MSEE with 2+ years of verification experience of wireless/wired communication block/subsystem.
  • Experience of using Matlab/C reference model and bit-accurate verification.
  • Verification experience of wireless/wired communication block/subsystem.
  • Knowledge of wireless protocols such as Bluetooth, UWB, WLAN, or Zigbee.
  • Proficient in shell and Python scripting, Perl scripting.
  • Experience of using AI technologies in data mining/analysis.
  • Experience of Palladium/FPGA validation.
  • Should be a team player with excellent communication skills, self-motivated and well organized.

Skills

Required:Verilog/SystemVerilogASIC verification flowsPython scripting
Nice to have:Matlab/C reference modelAI for DVPalladium/FPGA validationWireless protocols

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • discounted products and free services
  • educational expense reimbursement including tuition
  • discretionary bonuses or commission payments as well as relocation eligibility
Last updated Oct 23, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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