SoC Physical Design Engineer, PnR

In this visible role, you will be directly responsible for the physical implementation of design partition(s) (from netlist to tapeout) for a highly complex SOC utilizing innovative process technology. You will collaborate with architecture, CAD, timing and logic design teams to deliver best in class designs, focusing on back end chip design flow, physical synthesis, floor-planning, place and route, power grid, timing, and physical design verification.