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Standard Cell Design Methodology & Flow Engineer

Apple· Hardware
Apply on company site
Hybrid (San Diego, CA), Hybrid (Santa Clara, CA)$137.5k - $250.7kFull-timePosted 3d ago

About the role

Opportunity to join Apple's Digital Design Engineering group as a Standard Cell Design Methodology and Flow Engineer. You will interface with CAD/Foundry teams, develop and optimize standard cell libraries and flows, and apply data analysis and ML techniques to timing, power, and area trends while collaborating across library development and custom circuits teams.

Responsibilities

  • Be the interface to internal CAD team for planning production flows and with foundry on PDK requirements.
  • Collaborate with technology team on new process requirements and work with design/CAD team to enable relevant tools/flows.
  • Implement sophisticated digital block in Verilog/SystemVerilog, run simulations or formal check for verification.
  • Use data analysis techniques and/or sophisticated Machine Learning models to study the circuit trends in timing, power, and area, and to potentially detect quality issues in large datasets.

Qualifications

  • BS and a minimum of 3 years of relevant industry experience
  • At least 5+ years in Library Characterization, Timing/Power/CCS Noise/Variation Modeling, Liberty Formats, Spice simulation, Static Timing and Power Analysis flows, etc.
  • Experience with timing modeling of large custom macros and complex sequential flops.
  • Exposure to Design For Test, scan concept and write DFT friendly RTL
  • Understands all aspects of implementation specification, design, timing, power, and flow automation.
  • Data analysis and ML knowledge to study data trend and perform QA on big dataset with automation
  • Flow automation skills in standard cells development and integration to improve execution efficiency. Experience of using Python/TCL/Perl
  • Knowledge of FE modeling/Verilog and/or VHDL, and experience with various EDA tools for characterization, synthesis, place-route, Verilog simulation, spice simulation, formal verification, DRC/LVS, RC extraction and/or library characterization.
  • Proven understanding of device physics and process.
  • Familiar with foundry ecosystem and benchmarking practice.

Skills

Required:Verilog/SystemVerilogPythonLiberty formatsTiming/Power/CCS Noise/Variation ModelingEDA Tools (characterization, synthesis, place & route, simulation, DRC/LVS, RC extraction)Design For Test (DFT)
Nice to have:TCL/PerlMachine Learning/Data Analysis

Benefits

  • Comprehensive medical and dental coverage
  • retirement benefits
  • range of discounted products and free services
  • reimbursement for certain educational expenses — including tuition
  • discretionary bonuses or commission payments as well as relocation eligibility
  • Apple shareholder opportunities through stock programs
Last updated Oct 23, 2026. Interested? Apply on the company site.

About Apple

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

Discover the innovative world of Apple and shop everything iPhone, iPad, Apple Watch, Mac, and Apple TV, plus explore accessories, entertainment, and expert device support.

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