ASIC Design Engineer
Apple· Silicon Technologies / IP design team
Hybrid (Israel)full-timePosted 3d ago
About the role
ASIC Design Engineer in Apple’s IP design team to build high-performance, power-efficient processor SoC designs. Collaborates with architecture, design, and verification to enable high-bandwidth processing pipelines, digital RTL design, and front-end implementation tasks.
Responsibilities
- Coding high-quality RTL, with embedded assertions and cover points
- Writing detailed micro-architectural specifications
- Collaborating with multi-functional teams to explore solutions that improve performance while minimizing power and area
- Working closely with design verification and formal verification teams to debug and verify functionality and performance
Qualifications
- 5+ years of experience in digital design
- BS.c / MS.c in EE/ CE
- Experience in SoC front-end ASIC RTL digital logic design using Verilog or System Verilog
- Experience working multi-functionally with architecture, design, and verification teams to specify, design, and debug
- Good collaboration skills with strong written and verbal communication skills
- Familiarity with low-power design techniques such as clock- and power-gating is a plus
- Familiarity with common on-chip bus protocols such as AMBA (AXI, AHB, APB)
- Experience in front-end implementation tasks such as synthesis, timing, area/power analysis, linting, and logic equivalence checks
- Industry exposure to ASIC/FPGA design methodology including AI/ML applications and scripting languages (Python, Perl, TCL)
- Prefer previous experience in USB4, USB3, PCIe, and/or DisplayPort
- Prefer familiarity with AI/ML applications and related scripting languages
Skills
Required:RTL designMicro-architectural specificationVerification collaborationSystem Verilog
Nice to have:ScriptingAMBA protocolsLow-power design
Benefits
- Accessibility-focused culture and benefits (Apple’s accessibility initiatives)
Last updated Oct 23, 2026. Interested? Apply on the company site.
About Apple
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