Sr. Silicon Packaging Process Engineer, Silicon Technology (Starlink)
SpaceX· Starlink Process Engineering
Bastrop, TXfull-timePosted 6mo ago
About the role
Senior packaging process engineer leading wafer-level and chip-level packaging development for SpaceX Starlink, owning packaging processes from concept to production and driving NPI/NTI, equipment and material selection, and cross-functional collaboration.
Responsibilities
- Own packaging assembly processes from concept to mass production including equipment and material selection for wafer-level and chip-level systems
- Develop new technologies and establish baselines for assembly and packaging including wafer grinding, wafer dicing, lithography, lamination, plating, etching, SMT, flip chip, bonding, molding, underfill, dispense, sputter, lid attach, and solder ball attach
- Bring-up for new product introduction (NPI) and new technology introduction (NTI) for assembly packaging lines
- Own packaging prototypes, product development and release to production
- Select equipment and material to meet quality, reliability, cost, yield, and production targets
- Interface with equipment and material suppliers including continuous improvement plans, cost reduction, and productivity improvements
- Cross-functional interface with IC design, materials, thermal, systems, and production teams
- Implement advanced packaging solutions into SpaceX next generation products
Qualifications
- Bachelor’s degree in electrical engineering, mechanical engineering, chemical engineering, materials science, physics, or other applied engineering discipline
- 5+ years of professional experience in semiconductor assembly and packaging
Skills
Required:Packaging process ownershipWafer-level and chip-level packaging technologiesNPI/NTI bring-up
Last updated Jul 8, 2026. Interested? Apply on the company site.
About SpaceX
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