SI/PI Engineer
San Jose$250k - $400kFull-timePosted 3mo ago
About the role
Signal Integrity and Power Integrity (SI/PI) Engineer responsible for owning SI/PI methodology for high-speed PCB and system designs from architecture to release, ensuring electrical margins across multi-gigabit interfaces.
Responsibilities
- Perform pre- and post-layout SI simulations for high-speed serial interfaces including PCIe Gen5/Gen6, 112G/224G Ethernet
- Conduct channel analysis and link budget calculations; define topology constraints, trace geometry, stack-up requirements, and via optimization guidelines for PCB designers
- Develop and maintain COM, IBIS, S-parameter, and SPICE models; correlate simulation results against lab measurements
- Execute power delivery network (PDN) design and analysis: target impedance profiling, decoupling capacitor selection, AC/DC power analysis, and IR-drop simulation
- Drive DFI and design rule checks for SI/PI compliance; work with layout teams in Cadence Allegro / Sigrity or Ansys SIwave
- Collaborate with PCB design and layout engineers, and ASIC teams to define and review design guidelines early in the product lifecycle
- Support bring-up, debug signal quality issues, and document root-cause findings with clear corrective actions
- Develop and maintain simulation-to-hardware correlation databases to continuously improve modelling accuracy
Qualifications
- B.S. or M.S. in Electrical Engineering or a closely related discipline
- 5+ years of hands-on SI/PI experience on high-speed designs (>1 Gbps serial links or DDR4/5 and HBM3/4 memory interfaces)
- Proficiency with industry SI/PI EDA tools (Cadence Sigrity, Ansys SIwave/HFSS, Keysight ADS, or equivalent)
- Strong understanding of transmission line theory, return-loss, insertion-loss, crosstalk, eye-diagram analysis, and jitter decomposition
- Experience with PDN modelling, target impedance methodology, and DC IR analysis
- Working knowledge of multLayer PCB stack-up design and controlled-impedance trace routing
- Hands-on lab skills: S-parameter measurements with VNA, time-domain reflectometry (TDR), BERT operation, and oscilloscope probing techniques
Skills
Required:SI/PI engineeringHigh-speed interface analysis
Benefits
- Medical, dental, and vision packages with generous premium coverage
- $500 per month credit for waiving medical benefits
- Housing subsidy of $2,500 per month for those living within walking distance of the office
- Relocation support for those moving to San Jose (Santana Row)
- Various wellness benefits covering fitness, mental health, and more
- Daily lunch and dinner in our office
- Unlimited compute budget subject to ROI justification
Last updated Oct 15, 2026. Interested? Apply on the company site.
About Etched
Etched is building frontier inference clusters: co-designs chips, racks, software and manufacturing to push the pareto frontier for AI hardware.
frontier inference clustersAI hardwarechipsrackssoftwaremanufacturingparto frontier
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