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Senior ML Compiler Engineer

femtoAI
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San Bruno, CaliforniaFull timePosted 3mo ago

About the role

Senior ML Compiler Engineer at femtoAI. Design and build core components of the ML compiler, optimizing for hardware constraints and real-time performance. Lead development of compiler passes and collaborate with hardware teams on co-design.

Responsibilities

  • Design and implement compiler architecture across IR design and transformation pipelines
  • Optimization strategies for scheduling, tiling, and memory reuse
  • Lead development of complex compiler passes such as: Global memory allocation and liveness-driven reuse; Cross-operator fusion and graph partitioning; Hardware-aware scheduling strategies
  • Develop cost models and optimization heuristics
  • Explore advanced techniques: Constraint-based optimization (e.g., ILP/MILP/CP); Scheduling optimization
  • Drive debugging of system-level issues (correctness, performance, HW mismatches)
  • Collaborate with hardware teams on co-design of abstractions and execution models

Qualifications

  • 4+ years of experience in compilers, systems, or performance engineering
  • Masters or PhD in Computer Science, Electrical Engineering, Math, or a related field
  • Deep experience with at least one: ML compiler frameworks (MLIR, TVM, XLA, etc.); Low-level optimization (scheduling, memory, tiling)
  • Proven ability to design non-trivial compiler systems or passes
  • Strong intuition for performance across compute, memory, and data movement
  • Comfort working with hardware constraints

Skills

Required:ML compiler frameworksLow-level optimization

Benefits

  • 401(k)
  • Medical insurance
  • Vision insurance
  • Dental insurance
  • Commuter benefits
  • Disability insurance
  • Paid maternity leave
  • Paid paternity leave
  • Child care support
Last updated Oct 4, 2026. Interested? Apply on the company site.

About femtoAI

AI Inference for the Extreme Edge

AI Inference platform for edge devices enabling higher performance at lower latency with ultra-low power in compact silicon.

AI acceleratorEmbedded AI PlatformNeuromorphic computingSPUSparse Processing Unitbessemer-ai-infrastructure-2026edge AIinference-inflection-point
Company profileWebsite

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