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EDA Engineer (RFIC Engineering)

SpaceX· RFIC Engineering
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Redmond, WA$125k - $150kfull-timePosted 3mo ago

About the role

Hands-on EDA Engineer to support and improve the IC design environment for RFIC, analog/RF/mixed-signal, and digital silicon workflows at SpaceX Starlink, focusing on tool reliability, PDK usage, reproducible flows, and designer productivity.

Responsibilities

  • Support day-to-day EDA/CAD workflows for RFIC and silicon engineering teams, including tool launch, environment setup, PDK usage, simulation, physical verification, extraction, and related Linux workflows
  • Support analog/RF/mixed-signal specific flows (Virtuoso, Spectre, EM tools, etc.) in addition to digital and physical verification flows
  • Assist with PDK installation, qualification, version tracking, release notes, and deployment support for supported foundry processes
  • Triage DRC, LVS, PEX, simulation, EM, license, HPC, and environment issues using reproducible debug practices: command, log path, tool version, PDK version, run directory, expected result, actual result, and reproduce status
  • Maintain and improve tool launch wrappers, setup scripts, environment modules, path configuration, project templates, and onboarding material
  • Build lightweight automation in Python, Tcl, SKILL, shell, Perl, Makefile, or similar languages for log collection, preflight checks, license/tool health checks, regression reporting, and recurring issue reduction
  • Create and run targeted QA tests for PDK updates, tool upgrades, wrapper changes, vendor patches, and flow changes before broad deployment
  • Maintain clear runbooks and Confluence documentation for common EDA flows, including DRC/LVS/PEX debug, Cadence/Virtuoso setup, simulation setup, HPC job submission, license issues, and common user errors
  • Partner with design, layout, verification, physical design, IT/HPC, foundry, and EDA vendor teams to resolve blocked flows and improve methodology robustness
  • Identify recurring support patterns and help convert one-off fixes into durable flow changes, documentation, automation, or vendor/IT escalations
  • Support configuration-management and data-management workflows, such as Perforce, Cliosoft, or similar systems, as needed for silicon design teams
  • Contribute to modern EDA workflow improvements, including AI-assisted log triage, rule-deck validation, issue classification, signoff reporting, and designer self-service tools under senior guidance

Qualifications

  • Bachelor's degree in electrical engineering, computer engineering, or computer science
  • 2+ years of experience in EDA/CAD support, IC design flow development, silicon design, physical verification, verification infrastructure, and/or CAD automation

Skills

Required:EDA/CAD supportScripting and automation
Nice to have:Cadence Virtuoso/Spectre or equivalent

Benefits

  • Base salary details (Level 1: $125,000.00 - $150,000.00; Level 2: $145,000.00 - $175,000.00)
  • long-term incentives (stock or long-term cash awards)
  • discretionary bonuses
  • employee stock purchase plan
  • comprehensive medical, vision, dental coverage
  • 401(k) retirement plan
  • short and long-term disability insurance
  • life insurance
  • paid parental leave
  • paid vacation and holidays
  • paid sick time in Washington state
  • shuttle service from Seattle to SpaceX Redmond
Last updated Jul 15, 2026. Interested? Apply on the company site.

About SpaceX

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