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Design Verification Engineer (Silicon Engineering)

SpaceX· Silicon Engineering
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Hybrid (Austin, TX)full-timePosted 3mo ago

About the role

Design Verification Engineer for silicon/ASIC verification supporting Starlink hardware, including pre-silicon verification, chip bring-up, and post-silicon validation within a cross-disciplinary SpaceX team.

Responsibilities

  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Develop SystemVerilog testbench infrastructure (both UVM and non-UVM) for testing designs, including DSP blocks
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Automate test case generation by using Python and MATLAB programs
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Qualifications

  • Bachelor’s degree in electrical engineering, computer science or computer engineering
  • 1+ years of experience with design verification and test bench development

Skills

Required:Digital ASIC verificationSystemVerilogPython
Nice to have:MATLAB
Last updated Jul 15, 2026. Interested? Apply on the company site.

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