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Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX· Silicon Engineering
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Austin, TXfull-timePosted 3mo ago

About the role

Senior ASIC design verification role at SpaceX focused on digital verification for Starlink ASICs, working with cross-disciplinary teams to verify complex digital designs from pre-silicon to post-silicon validation.

Responsibilities

  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Qualifications

  • Bachelor’s degree in electrical engineering or computer engineering
  • 5+ years of experience with design verification and test bench development
  • Advanced degree in electrical engineering or computer engineering (preferred)

Skills

Nice to have:Verification methodologies (UVM/OVM/VMM)Object-oriented programmingConstrained random verificationTest plan development and coverage modelingPython scriptingRTL design, chip bring-up, post-silicon validation
Last updated Jul 15, 2026. Interested? Apply on the company site.

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