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Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX· Silicon Engineering
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Palo Alto, CA$175k - $280kFull-timePosted 3mo ago

About the role

Senior ASIC design verification role at SpaceX supporting Starlink; responsible for digital ASIC verification at block/system level, test plan development and execution, pre/post-silicon activities, and hands-on verification in a dynamic, space-focused environment.

Responsibilities

  • - Responsible for digital ASIC verification at block and system level
  • - Write and review test plans, develop test harnesses and test sequences
  • - Responsible for test plan execution, running regressions, code and functional coverage closure
  • - Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • - Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Qualifications

  • - Bachelor’s degree in electrical engineering or computer engineering
  • - 5+ years of experience with design verification and test bench development

Skills

Required:Test plan developmentTest bench development
Nice to have:UVM/OVM/VMMConstrained random verificationPython scriptingRTL design / post-silicon validation

Benefits

  • Comprehensive medical, vision, and dental coverage
  • 401(k) retirement plan
  • Short & long-term disability insurance
  • Life insurance
  • Paid parental leave
  • 3 weeks paid vacation and 10+ paid holidays per year
  • Sick leave (5 days per year for exempt employees)
  • Employee stock/long-term incentives (stock options or long-term cash awards)
  • Employee stock purchase plan
  • Discretionary bonuses and other discounts and perks
Last updated Jul 15, 2026. Interested? Apply on the company site.

About SpaceX

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