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Sr. ASIC Design Verification Engineer (Silicon Engineering)

SpaceX· Silicon Engineering
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Irvine, CA$165k - $260kFull-timePosted 3mo ago

About the role

Senior ASIC design verification role at SpaceX focusing on digital ASIC verification at block and system level, pre-/post-silicon verification, and collaboration with cross-disciplinary teams to develop next-generation ASICs for Starlink hardware.

Responsibilities

  • Responsible for digital ASIC verification at block and system level
  • Write and review test plans, develop test harnesses and test sequences
  • Responsible for test plan execution, running regressions, code and functional coverage closure
  • Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
  • Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs

Qualifications

  • Bachelor’s degree in electrical engineering or computer engineering
  • 5+ years of experience with design verification and test bench development

Skills

Required:Digital ASIC verificationTest plan developmentTest harness and test sequence development
Nice to have:UVM/OVM/VMMObject-oriented programmingConstrained random verificationPython scriptingRTL design, chip bring-up, post-silicon validation

Benefits

  • Comprehensive medical, vision, and dental coverage
  • 401(k) retirement plan
  • Short & long-term disability insurance
  • Life insurance
  • Paid parental leave
  • 3 weeks of paid vacation & 10+ paid holidays per year
  • 5 days of sick leave per year (exempt)
  • Stock-based incentives and employee stock purchase plan
  • Discretionary bonuses and other discounts and perks
Last updated Jul 15, 2026. Interested? Apply on the company site.

About SpaceX

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