Verification Engineer
Hybrid (Bristol/London)Full-timePosted 3mo ago
About the role
Silicon Verification Engineer role focused on building world-class ML/AI IC products for data centre scale, working across modelling, system architecture, and RTL design to ensure high-quality RTL releases and tape-out efficiency.
Responsibilities
- Work closely with modelling, system architecture, and RTL design to ensure RTL releases meet high functional quality
- Contribute to discussions around specification, architecture, and workflows connecting them
- Deliver on the development of hardware verification workflows and improve tape-out quality and cost efficiency
- Collaborate across hardware and software teams in a fast-paced, open environment
- Contribute to architecture discussions and overall product development
Qualifications
- Strong software skills (Python or other object-oriented language such as C++)
- Understanding of digital hardware concepts
- Ability to read and debug RTL in SystemVerilog
- Familiarity with debugging waveforms
- Candidates with UVM or strong software background encouraged to apply even without RTL background
Skills
Required:PythonSystemVerilogWaveform debugging
Benefits
- Competitive salary
- Equity & Ownership
- Private Medical, Dental and Vision
- Contributory Pension
- 25 Days holiday plus bank holidays
- Life/Critical Illness Insurance
- Diverse & fun office environment
Last updated Jul 23, 2026. Interested? Apply on the company site.
About Fractile
Radically Accelerate Frontier Model Inference
Fractile is designing AI compute systems that will enable the next generation of AI scaling: frontier model inference, 25x faster, at 1/10th the cost.
frontier model inferenceAI computecompute systemsAI scalinginference hardwareprocessor innovation
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