Senior Verification Engineer
Hybrid (Bristol or London)full-timePosted 3mo ago
About the role
Senior Verification Engineer based in Bristol or London, focused on pre-silicon RTL verification for ML/AI ICs and collaboration across modelling, system architecture, and RTL design to deliver high-quality RTL releases for scale-out data-center applications.
Responsibilities
- Read and debug RTL in SystemVerilog and debug waveforms
- Collaborate with modelling, system architecture and RTL design teams to ensure functional quality of RTL releases
- Contribute to discussions around specification, architecture and workflows
- Build world-class ML/AI IC products for scale-out to data centre applications
- Engage in pre-silicon RTL verification activities including verification planning and execution, testbench construction, stimulus creation, functional modelling, checker creation, coverage definition/closure
- Contribute to architecture discussions and open-source tooling usage (Cocotb, Verilator, etc.)
- Work in a fast-paced, open, collaborative environment with ownership and rapid iteration
Qualifications
- Strong software skills (Python or C++)
- Understanding of digital hardware concepts
- Ability to read and debug RTL in SystemVerilog
- Familiarity with debugging waveforms
- Candidates with UVM or strong software background encouraged to apply even without RTL background
Skills
Required:PythonSystemVerilogWaveform debugging
Nice to have:C++
Benefits
- Private Medical
- Dental and Vision
- Contributory Pension
- 25 Days holiday plus bank holidays
- Life/Critical Illness Insurance
- Equity & Ownership
Last updated Jul 23, 2026. Interested? Apply on the company site.
About Fractile
Radically Accelerate Frontier Model Inference
Fractile is designing AI compute systems that will enable the next generation of AI scaling: frontier model inference, 25x faster, at 1/10th the cost.
frontier model inferenceAI computecompute systemsAI scalinginference hardwareprocessor innovation
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