Chip/EDA/Software Intern
Hybrid (Mountain View, CA)$5.2k/mo - $7k/moInternPosted 2mo ago
About the role
Software internship with VLSI experience to build AI-native tools and agent-driven workflows for chip design. In-person role in Mountain View, CA; part-time or full-time possible, with potential transition to full-time.
Responsibilities
- Build/ship critical EDA software (Python/C++) to Fortune enterprises and chip unicorns
- Be a liaison with some of our tooling partners
- Collaborate directly with the founders on key engineering design decisions
Qualifications
- Available for 15-40 hours/week in-person in Mountain View, CA
- Good at writing/shipping high-quality code (Python/C++) quickly
- Basic VLSI experience (coursework or projects)
- Adaptive, data-driven, and works from first principles
Skills
Required:PythonC++VLSI
Benefits
- Generous salary
- Commuting stipend
- Team meals
Last updated Aug 5, 2026. Interested? Apply on the company site.
About Silimate
The copilot for chip designers
Silimate is the copilot for chip designers; it finds and fixes functional and PPA issues in your chip designs. Today, chip teams spend most of their 12-18 month design cycles converging slowly to functional correctness and their targeted PPA (power/performance/area). With Silimate, chip designers create correct, PPA-converged RTL code in minutes and eliminate months from their tape out schedule.
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