Chip/Software Engineer
Hybrid (Mountain View, CA / San Francisco, CA)$140k - $220kFull-timePosted 2mo ago
About the role
Engineer with experience in VLSI front-end design flow to help build/scale AI-native EDA tools and agent-driven workflows.
Responsibilities
- Write code (Python/C++) that ships to Fortune enterprises and chip unicorns
- Make software architectural decisions for key product features
- Translate user feedback into product updates/features
- Plan core product roadmap and strategy
Qualifications
- Passionate and excited about chips and AI for EDA
- Experienced with designing ASICs using SystemVerilog and synthesis/verification tools (open-source and/or commercial)
- Experienced with common front-end EDA tools
- Good at writing/shipping high-quality code (Python/C++) quickly
- Basic knowledge of statistics & AI/ML methods
- Resilient, data-driven, and works from first principles
Skills
Required:PythonC++SystemVerilogEDA tools
Benefits
- Generous salary and equity package
- Full health/vision/dental/401k benefits
- Team meals
Last updated Aug 5, 2026. Interested? Apply on the company site.
About Silimate
The copilot for chip designers
Silimate is the copilot for chip designers; it finds and fixes functional and PPA issues in your chip designs. Today, chip teams spend most of their 12-18 month design cycles converging slowly to functional correctness and their targeted PPA (power/performance/area). With Silimate, chip designers create correct, PPA-converged RTL code in minutes and eliminate months from their tape out schedule.
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